Conventionally, a power amplifier is one of essential electronic components in a transmitter circuit used, for example, in a portable phone. The power amplifier amplifies at once an electric signal having a small power of several mW order generated by a signal processing IC (Integrated Circuit) to an electric signal having a large power close to one W order, and transmits the amplified electric signal to a transmitting antenna.
In recent years, an MMIC (Microwave Monolithic Integrated Circuit) composed of a GaAs-HBT (Ga—As Hetero-junction Bipolar Transistor) is typically used as a device for a power amplifier. A bipolar power amplifier should be provided with two kinds of bias terminals that include a base bias terminal generally called “Vbb terminal” and a collector bias terminal generally called “Vcc terminal”.
The power amplifier here is an electronic component that handles an outstandingly large signal power among signal powers handled by all electronic components of a portable phone. Thus, two factors of the power amplifier are considered to be important. First, a high efficiency design technique is important because superiority of power utilization efficiency of the power amplifier directly influences battery consumption. Second, a sophisticated linearization design technique is important because the power amplifier is one of the components in which signal distortion occurs most frequently due to non-linearity.
It is known that design of a bias circuit including the Vbb terminal is particularly important for realization of the high power utilization efficiency and the sophisticated linearization in the bipolar power amplifier that is typically used in the recent years. Such a view is explained in detail in many documents, for example, Japanese Unexamined Patent Publication No. 94360/2001 (Tokukai 2001-94360 (published on Apr. 6, 2001)) (Publicly Known Document 1).
A design technique of a bias circuit in a bipolar transistor is in the field of a Si (silicon) analog IC which field is publicly known field studied for a long time. However, there are more constraints in a GaAs power amplifier MMIC than in the conventional Si analog IC. Accordingly, exactly the same technique as a technique for the conventional Si analog IC cannot be applied to the GaAs power amplifier MMIC. Therefore, a new modified bias circuit has been continuously studied.
The followings are examples of a constraint peculiar to the GaAs power amplifier MMIC. First, because a threshold voltage inherent to the transistor itself is large, only two transistors can be connected (cascade-connected) between a power supply (typically 3.3V) and the ground. Second, because the MMIC deals with a large power signal, the bias circuit (direct current circuit) section tends to be influenced by other high frequency circuit section. Accordingly, separation between the two circuit sections needs to be considered.
Many documents disclose various circuit configurations as conventional techniques of designing a bias circuit suitable for the GaAs power amplifier MMICs. A technique for improving stability of a bias circuit is disclosed in Japanese Unexamined Patent Publication No. 163640/1999 (Tokukaihei 11-163640 (published on Jun. 18, 1999)) (Publicly Known Document 2) and Japanese Unexamined Patent Publication No. 9558/2002 (Tokukai 2002-9558 (published on Jan. 11, 2002)) (Publicly Known Document 3).
A bias circuit as disclosed in the Publicly Known Document 2 has a configuration of a basic bias circuit for improving stability of the bias circuit. Moreover, a bias circuit as disclosed in the Publicly Known Document 3 has a configuration of a modified bias circuit that improves stability more than the basic bias circuit.
Now, with reference to FIG. 8, first explained is a configuration of a conventional first bias circuit having a configuration of the basic bias circuit as disclosed in the Publicly Known Document 2. Then, with reference to FIG. 10, explained is a configuration of a conventional second bias circuit that is a modified bias circuit as disclosed in the Publicly Known Document 3.
FIG. 8 is a circuit diagram illustrating a configuration of the conventional first bias circuit.
The conventional first bias circuit, as illustrated in FIG. 8, includes a first transistor 501, a second transistor 502, a resistor 503, an adjustment resistor 504, a third transistor 506, an adjustment resistor 507, and an adjustment resistor 508. Moreover the first transistor 501, the second transistor 502, the resistor 503, and the adjustment resistor 504 constitute a circuit block section 505.
The first bias circuit is used to supply a bias current to a base terminal of a high frequency amplifying transistor 523. The high frequency amplifying transistor 523 amplifies a high frequency signal received from an input port 521 and outputs the amplified high frequency signal to an output port 522.
In the first bias circuit, a current mirror reflects a potential stabilized by the circuit block section 505 to the third transistor 506. With this reflected potential, the first bias circuit stably operates the third transistor 506 at a constant current.
The circuit block section 505 is provided with power from a first power supply port 5 11. The third transistor 506 receives a collector bias from a second power supply port 512 via the adjustment resistor 507 and a base bias from the circuit block section 505 (a potential at a point H in FIG. 9 explained later). The third transistor 506 supplies an emitter output to a base terminal of the high frequency amplifying transistor 523 via the adjustment resistor 508 or the like according to need.
A stabilized potential is explained above to be taken out from the circuit block section 505. Now, characteristics of the circuit block section 505 are explained in detail. The circuit block section 505 constitutes a reference power supply circuit. Therefore, it is possible to take out a stabilized potential from the circuit block section 505.
The reference power supply circuit is a publicly known circuit and, for example, described as a “current reference circuit” in “Design Technique of Analog Integrated Circuits for System LSI (I)” (P. R. Gray et al., Forth Edition, Baifukan Co. Ltd., July, 2003, p. 359). The current reference circuit becomes a “voltage reference circuit” according to usage. Therefore, in this specification, the circuit is uniformly referred to as “reference power supply circuit” so that unnecessary distinction is avoided.
With reference to FIG. 9, the reference power supply circuit is explained in detail.
FIG. 9 is a circuit diagram illustrating a configuration of a reference power supply circuit 600.
As illustrated in FIG. 9, the reference power supply circuit 600 includes a first transistor 601, a second transistor 602, a resistor 603, and an adjustment resistor 604. The first transistor 601 corresponds to the first transistor 501, the second transistor 602 to the second transistor 502, the resistor 603 to the resistor 503, and the adjustment resistor 604 to the adjustment resistor 504.
The first transistor 601 and the second transistor 602 have a feedback relationship in which the first transistor 601 and the second transistor 602 compensate each other. In other words, an input terminal (base terminal) and an output terminal (collector terminal) of the first transistor 601 are connected to an output terminal (emitter terminal) and an input terminal (base terminal) of the second transistor 602, respectively.
Moreover, the collector terminal of the first transistor 601 is connected to a first power supply port 611 via an adjustment resistor 604 and the emitter terminal thereof is grounded. The collector terminal of the second transistor 602 is connected to a second power supply port 612 and the emitter terminal of the second transistor 602 is grounded via a resistor 603.
Accordingly, a point H and a point I as illustrated in FIG. 9 are separated from influences of the first power supply port 611 and the second power supply port 612 in the circuit. This keeps potentials at the point H and the point I constant regardless of a power supply voltage change.
This stabilizes the reference power supply circuit 600 against a power supply voltage change. The third transistor 506 in the first bias circuit as in FIG. 8 receives a base bias from a potential at the point H in FIG. 9.
The reference power supply circuit 600 as illustrated in FIG. 9 is widely known as a typical stable power supply circuit whose dependency on the power supply voltage is low, and often used in practice. With reference to FIG. 3, an idea of the characteristic such that the reference power supply circuit has low dependency on the power supply voltage is explained.
FIG. 3 is a graph illustrating a stability of each circuit against a power supply voltage change. A horizontal axis indicates a power supply voltage given to a power supply circuit as in FIG. 9 and a vertical axis indicates a voltage/current that can be taken out from the power supply circuit as in FIG. 9. Here, lines X and Y in FIG. 3 are explained. A line Z in FIG. 3 is explained later in the Embodiment.
As with the line X in FIG. 3, output voltages/currents of many simple power supply circuits show a significant monotone increase in accordance with an increase in the power supply voltage.
Meanwhile, as with the line Y in the FIG. 3, an output voltage/current of the reference power supply circuit 600 as in FIG. 9 shows a monotone increase. The slope of the graph is suppressed to be small and the output voltage/current is relatively stable. This shows that the reference power supply circuit has low dependency on the power supply voltage.
Next, with reference to FIG. 10, a configuration of a conventional second bias circuit is explained.
FIG. 10 is a circuit diagram illustrating a configuration of a conventional second bias circuit.
The conventional second bias circuit, as illustrated in FIG. 10, includes a first transistor 701, a second transistor 702, a resistor, 703, an adjustment resistor 704, a third transistor 706, an adjustment resistor 707, an adjustment resistor 708, and a fourth transistor 709. The first transistor 701, the second transistor 702, the resistor 703, and the adjustment resistor 704 constitute a circuit block section 705.
The second bias circuit is used to supply a bias current to a high frequency amplifying transistor 723. The high frequency amplifying transistor 723 that amplifies a high frequency signal received from an input port 721 and outputs the amplified high frequency signal to an output port 722.
In the second bias circuit, as with the first bias circuit, current mirrors reflect a potential stabilized by the circuit block section 705 to the third transistor 706 and the fourth transistor 709. With this reflected potential, the second bias circuit stably operates the third transistor 706 and the fourth transistor 709 at a constant current.
Power is supplied to the second bias circuit from a first power supply port 7 11 via the adjustment resistor 704 and a second power supply port 712 via the adjustment resistor 707. The second bias circuit is different from the first bias circuit in that the current mirrors are formed at the same time in two paths which are (i) between the first transistor 701 and the fourth transistor 709 and (ii) between the second transistor 702 and the third transistor 706.
More specifically, the circuit block section 705 is provided with power from the first power supply port 711. Moreover, the third transistor 706 receives a collector bias from the second power supply port 712 via the adjustment resistor 707 and a base bias from the potential at the point H as in FIG. 9. An emitter terminal of the third transistor 706 is connected to a point G. A collector terminal of the fourth transistor 709 is connected to the point G and the fourth transistor 709 receives a base bias from a potential at the point I as in FIG. 9. An emitter terminal of the fourth transistor 709 is grounded. Moreover, the third transistor 706 supplies an emitter output from the point G to a base terminal of the high frequency amplifying transistor 723 via the adjustment resistor 708 or the like according to need.
A typical bias circuit is not used by itself. For example, the typical bias circuit is connected to an amplifying transistor included in a power amplifier and used to supply a bias current to the amplifying transistor. With reference to FIG. 11, a configuration of an entire typical power amplifier that employs the second bias circuit is explained.
FIG. 11 is a schematic diagram illustrating a configuration of a conventional power amplifier that employs second bias circuits.
The conventional power amplifier is a two-stage amplifier including a power sensor 830 which amplifier amplifies a high frequency in two stages by high frequency amplifying transistors 815 and 818. A section including bias circuits 805a through 805c is a bias circuit for the two-stage amplifier including the power sensor 830.
In the power amplifier, as illustrated in FIG. 11, two high frequency amplifying transistors 815 and 818 are cascade-connected between an input port 811 and an output port 812 so as to be sandwiched by three matching circuits 814, 817, and 820. Collector biases of the two high frequency amplifying transistors 815 and 818 are provided with power from the power supply ports 816 and 819, respectively.
A part of high frequency power at an output port 812 is lead to the power sensor 830 via a capacitor 821, and outputted from an output port 813 after converted into a direct current voltage.
The power sensor 830 is typically a circuit having a configuration in which, for example, an output end of a diode 823 is grounded by a capacitor 824 in terms of high frequency and grounded by a resistor 825 in terms of a direct current. Components of the power sensor 830 are beyond the scope of the present invention and the explanation thereof does not go into in details.
The power amplifier includes three conventional second bias circuits as the bias circuits 805a through 805c. The bias circuits 805a and 805b supply base biases to the high frequency amplifying transistors 815 and 818, respectively.
Moreover, in many cases, a bias is applied to the power sensor 830 for the purpose of increasing a dynamic range. Therefore, in the conventional power amplifier, the bias circuit 805c is connected to the diode 823 via an adjustment resistor 822. The bias circuits 805a through 805c are provided with power via the power supply ports 801 through 804.
However, recently, in design of a bias circuit including a Vbb terminal that is a key to the power amplifier, in addition to problems such as realization of high efficiency and sophisticated linearization explained above, a new problem is drawing attentions. A main object of the present invention is to solve this new problem by overcoming limitations of the conventional technique.
In recent years, a level of a modulation system adopted in a wireless communication system in society is becoming higher and higher every year (ex. OFDM: Orthogonal Frequency Division Multiplexing System). Moreover, adoption of a predistortion technique (a linearization technique to superimpose, on a distortion characteristic of a power amplifier, an inverse characteristic of the distortion characteristic which is measured and recorded in advance, at the time of modulation) in an open loop system is attempted. Therefore, even a little change in a characteristic is becoming impermissible, with respect to a power amplifier.
Meanwhile, regarding a portable phone as a whole, a move to reduce cost and size does not stop. The cost and size are reduced by reducing the number of components and performance which concern a power supply circuit. Accordingly, quality of power externally supplied to the power amplifier is deteriorating.
Therefore, the power amplifier is required to further improve stability against a temperature change and/or a power supply voltage change. For improving performance of the power amplifier, the design of a bias circuit including a Vbb terminal is particularly important, as mentioned above.
The first bias circuit of the Publicly Known Document 2 does not adequately deal with a temperature change and/or a power supply voltage change. Meanwhile, in the second bias circuit of the Publicly Known Document 3, an attempt is made to improve stability against a temperature change and/or a power supply voltage change. However, the recent situation requires further improvement in the stability.
Moreover, in the second bias circuit, as illustrated in FIG. 10, a bias current is taken out from the point G. Therefore, not all the emitter current of the third transistor 706 is supplied as the bias current, but a part of the emitter current flows into the fourth transistor 709. Consequently, power consumption of the fourth transistor 709 becomes large.
However, in recent years, a power saving function (shutdown function) becomes widespread. The power saving function is intended to reduce a current (typically tens mA order) unnecessarily consumed during a waiting state of the power amplifier to substantially zero (some μA order). In an HBT type power amplifier, the simplest method of realizing the shutdown function is a method of directly driving the Vbb bias terminal by a shutdown control signal.
However, for realizing the method, it is necessary to reduce power consumption of the Vbb bias terminal in accordance with substantially zero current driving force of a shutdown control signal generated in a CMOS logic circuit. Accordingly, in a GaAs power amplifier MMIC, a consuming current to be supplied to the Vbb bias terminal is required to be reduced.
Therefore, the bias circuit is required to suppress the consuming current and to output a bias current that is more stable against the temperature change and/or the power supply voltage change.
For handling the above requirement, an increase in a circuit scale of an entire bias circuit is unavoidable. This causes a problem of a chip area increase. Therefore, a circuit capable of satisfying the above requirement needs to be realized by a circuit having a scale as small as possible. Consequently, a reduction in a chip area is also required.